¿ªÔÆÌåÓý


Calibration

 

First post & maybe this is OT and if so please delete it.

I am looking for the calibration procedure for a:
Amprobe 37XR-A? DMM.

When I check it on my calibration source, everything is good but the resistance measurements which read low.
I did check the calibrator with my Fluke 189 & they are spot on.

I already called Amprobe/Fluke & they were no help.

Thanks.
--
-Bob


Re: Open Source Signature Analyzer

 

Great idea. I have the 5004 somewhere. A lot of instruments fall back to signature analysis when troubleshooting gets tough. Sometimes the person writing the manual cant tell you how the circuit works, maybe they don¡¯t know.?
?
I like a fast, well triggered scope. Sometimes I use Tek 2467B, or if digital is needed for say roll mode I use Tek MDO4K.
?
I am working on Boonton Modulation Analyzer. Z80 design. Let's see. Power supplies, clock, chip select, bus.
?
Sure enough, signature analysis. I have logic analyzers for that. Dip header, i/o, int, address, data.


Re: Open Source Signature Analyzer

 

Thanks, I shall look into it, but it'll be a while before I get to do much, working on regularizing the driver structure in a project.? Hmmm, state machine, VHDL, IEEE-488?

Harvey

On 7/1/2023 3:05 PM, Paul Amaranth wrote:
On Sat, Jul 01, 2023 at 11:58:47AM -0400, Harvey White wrote:

I now use this tool a lot, writing UIs are trivial.
This is for UI's or Finite State stuff?

Sounds interesting

you have added several projects to my list

Harvey
It's for anything you can structure as an FSA. The tool itself is
language agnostic and there are templates for C, C++, java, php, rex,
sql, bash, awk and even cobol among others. It is not difficult to
write a template for a new language or environment. For the arduino
environment I modified the C template into a state machine that would
work in the standard arduino loop() environment. For pretty much any
program, the main loop looks like this:

void loop()
{
stateMachine ();
}

Here's what the main loop looks like in the libero dialog:

Expecting-Event:
(--) LongButton -> Config-Clk-Pol
+ Display-Config-Clk-Pol
+ Get-Next-Event
(--) ShortButton ->
+ Start-acq-if-single-shot
+ Get-Next-Event
(--) Sig-Start ->
+ Set-triggered-ind
+ Get-Next-Event
(--) Sig-Stop ->
+ Update-Sig-Display
+ Get-Next-Event

Expecting-Event is the current state, items after the {--) are
events, items after the -> are the next state. If there's nothing
listed, it stays in the current state and items after the +s are
actions that are executed in order. These later generate stubs
for the program.

Config-Clk-Pol is the first state in the clock polarity configuration
dialog. So when a long button press is detected, it calls the
display-config-clk-pol routine, calls get-next-event and transitions to
the Config-Clk-Pol state, which is described in another section of
the dialog.

The Get-Next-Event action is one of the most important procedures;
it identifies the next event and sends it to the state machine.
In this kind of loop state machine, nothing happening is also an
event which keeps you in the current state. You can set up defaults
so you can keep the noise down. That's also an easy way to ignore events
that you don't want to handle in a given state (say, the sig-start
signal showing up while in configuration mode).

For other applications, it's possible that the actions generate the
event, so there is no need for a separate get event procedure.

There's a tradeoff in how granular to make the actions. You want
it verbose enough so actions are descriptive and could be reused
but not excessively wordy.

As to incorporating the CRC register tests, I suppose you could and
set up a self test mode. To execute the test I had to remove a
couple of the ICs and jumper a few lines, but there doesn't seem
to be any major issues in adding hardware to do that. It's a
development tool though so I don't think you'd bother with that
after it's built. If you're writing it in VHDL, it's only more
text, so why not? I will include a little signature generator
though so you can verify correct operation.

Paul


Re: Open Source Signature Analyzer

 

I have a 308, so it's more of an interesting problem that may
be of value to others.

308s are probably the cheapest way to get an SA, but it is difficult
to find one with all of the probes for reasonable money. The last
308 I bought a couple years back set me back $35. No pods though.

The 308 does have other uses though, it's a nice 8 bit logic analyzer,
useful for tiny projects. I used to use mine for that quite a bit
until I got an HP 54620C. Pity the serial rs232 only goes to 9600 baud.
But sometimes you only need a tack hammer.

Paul

On Sat, Jul 01, 2023 at 12:15:02PM -0700, ebrucehunter via groups.io wrote:
aul,

I see Tek 308s are selling for $99 or best offer with free shipping on that infamous site.? Are required accessories the expensive issue, or is it the $99?

Bruce, KG6OJI
--
Paul Amaranth, GCIH | Manchester MI, USA
Aurora Group of Michigan, LLC | Security, Systems & Software
paul@... | Unix/Linux - We don't do windows


Re: Open Source Signature Analyzer

 

aul,

I see Tek 308s are selling for $99 or best offer with free shipping on that infamous site.? Are required accessories the expensive issue, or is it the $99?

Bruce, KG6OJI


Re: Open Source Signature Analyzer

 

On Sat, Jul 01, 2023 at 11:58:47AM -0400, Harvey White wrote:

I now use this tool a lot, writing UIs are trivial.
This is for UI's or Finite State stuff?

Sounds interesting

you have added several projects to my list

Harvey
It's for anything you can structure as an FSA. The tool itself is
language agnostic and there are templates for C, C++, java, php, rex,
sql, bash, awk and even cobol among others. It is not difficult to
write a template for a new language or environment. For the arduino
environment I modified the C template into a state machine that would
work in the standard arduino loop() environment. For pretty much any
program, the main loop looks like this:

void loop()
{
stateMachine ();
}

Here's what the main loop looks like in the libero dialog:

Expecting-Event:
(--) LongButton -> Config-Clk-Pol
+ Display-Config-Clk-Pol
+ Get-Next-Event
(--) ShortButton ->
+ Start-acq-if-single-shot
+ Get-Next-Event
(--) Sig-Start ->
+ Set-triggered-ind
+ Get-Next-Event
(--) Sig-Stop ->
+ Update-Sig-Display
+ Get-Next-Event

Expecting-Event is the current state, items after the {--) are
events, items after the -> are the next state. If there's nothing
listed, it stays in the current state and items after the +s are
actions that are executed in order. These later generate stubs
for the program.

Config-Clk-Pol is the first state in the clock polarity configuration
dialog. So when a long button press is detected, it calls the
display-config-clk-pol routine, calls get-next-event and transitions to
the Config-Clk-Pol state, which is described in another section of
the dialog.

The Get-Next-Event action is one of the most important procedures;
it identifies the next event and sends it to the state machine.
In this kind of loop state machine, nothing happening is also an
event which keeps you in the current state. You can set up defaults
so you can keep the noise down. That's also an easy way to ignore events
that you don't want to handle in a given state (say, the sig-start
signal showing up while in configuration mode).

For other applications, it's possible that the actions generate the
event, so there is no need for a separate get event procedure.

There's a tradeoff in how granular to make the actions. You want
it verbose enough so actions are descriptive and could be reused
but not excessively wordy.

As to incorporating the CRC register tests, I suppose you could and
set up a self test mode. To execute the test I had to remove a
couple of the ICs and jumper a few lines, but there doesn't seem
to be any major issues in adding hardware to do that. It's a
development tool though so I don't think you'd bother with that
after it's built. If you're writing it in VHDL, it's only more
text, so why not? I will include a little signature generator
though so you can verify correct operation.

Paul

--
Paul Amaranth, GCIH | Manchester MI, USA
Aurora Group of Michigan, LLC | Security, Systems & Software
paul@... | Unix/Linux - We don't do windows


Re: Open Source Signature Analyzer

 

Interleaved:

On 7/1/2023 9:44 AM, Paul Amaranth wrote:
Nice to see the responses.

I knew everyone would put up their favorite processor, but I use
ATMegas a lot in embedded projects. They're cheap, available and
convenient. I also have a closet full of them. You may port
the project to your favorite chip. As they say, that is left
as an exercise for the student ...
I have a few of them, but I ran out of memory in them, as well as they were rather slow.? I went from MEGA to XMEGA, which locked me into a 3.3 volt world.? From there, going to ARM was the next step.? I have to be particular about which ARM processors I use, too.



I use the makefile build environment and avoid the IDE. Generally,
libraries for all of the sensor chips are available, sometimes
multiple versions and sometimes even with well written code. I've been
writing software for over 40 years using essentially the same emacs
based tools and this fits right in.
And I use the CubeMXIDE, which has its own set of problems, but I at least know the workarounds.


If I were building this as a new product, I would probably
use a fpga or cpld and a fancy OLED graphics panel, but that's
not the point.
Nope, you use what you have and are familiar with.? If you build something for general consumption, you build what most people have and are familiar with.

I already have the infrastructure for TFT displays, graphics, and the like, so that's what I'd use.? Rather seriously, at this point, if I wanted one, I'd use an existing board design with all of the above, then just build a daughterboard (a la BeagleBoard or Arduino) for the chips and interface.? All sorts of goodies built in, serial, I2C, NRF mesh networking, lotsa memory, etc.

A couple of things I've run across during this project:

Sigrok has a SA plugin which you can use with a $10 Salaea clone.
It works, sort of, but I seem to recall some difficulty in getting
stable signatures. Anyway, that's clearly a path of last resort.
Would be, although those clones have nice uses.

One of the HP application notes has a little test circuit with a
7490 decade counter along with expected signatures. These work
fine with a 5400a, they do not work with the Tek 308. The circuit
ties the start and stop lines together. The 5400a has a small
state machine that controls the acquisition, the 308 just uses a
couple of flipflops and gets confused in that situation. For the
308, start and stop pulses should be differentiated in time.
Which somewhat explains the differences between the two.? I tend to use the 5005B more than the 308.
One easy way to test that the CRC logic and register reading stuff
is correct is to connect the data input to Vcc and see the result.
With a constand Data=High input, the signature is only dependant on the
number of clock transistions in the acquisition window. It is trivial
to write a program to generate the expected signatures, so it is easy
to verify that all works.
With a suitable processor and a bit more logic, why not build the test programs and the like into the whole program?

The obvious way to structure something like this is basing the code
on an FSA. There are lots of ways to write something like that, most
are tedious and error prone. While looking for a better way, I
ran across references to a program called Libero written by Pieter
Hintjens. Some reading showed that this man was a certified
genius. He sadly passed in 2016, but he left behind huge contributions
to the art.

Libero is available on github and took very little effort to compile
in a current environment. I built a template for the arduino model
and spent a couple days understanding how the fsa generator works. The
examples, unfortunately, are not very good in fostering understanding,
but it's worth the struggle. You write a "dialog" which is an FSA
description and it gets compiled into a code skeleton with all the
required stubs and the state machine code required to run it. If set
up correctly you just flesh out the stubs. Changing the FSA is trivial
and the compiler is smart enough not to overwrite your code so development
is rapid. I strongly recommend that anyone who writes code take a look
at this tool. iMatrix (his company) also published newsletters which are
very interesting to read. Here's a couple links:

This is sort of an overview and has links to some of the things Pieter did


Here's the libero documentation:


I now use this tool a lot, writing UIs are trivial.
This is for UI's or Finite State stuff?

Sounds interesting

you have added several projects to my list

Harvey



Paul


Re: Open Source Signature Analyzer

 

Hi,
Very interested in updates please. I would like to build one as I have an HP signal generator that I have been unable to debug as I don't have a signature analyser.
Thanks,
Andrew


Re: Open Source Signature Analyzer

 

So ask them for it, detailing your concerns.

Lester B Veenstra? K1YCM M?YCM W8YCM 6Y6Y W8YCM/6Y 6Y8LV (Reformed USNSG
CTM1)
lester@...

452 Stable Ln
Keyser WV 26726 USA

GPS: 39.336826 N? 78.982287 W (Google)
GPS: 39.33682 N? 78.9823741 W (GPSDO)


Telephones:
Home:????????????+1-304-289-6057
US cell??????????+1-304-790-9192
Jamaica cell:? +1-876-456-8898

-----Original Message-----
From: [email protected]
[mailto:[email protected]] On Behalf Of Paul
Amaranth
Sent: Saturday, July 1, 2023 9:47 AM
To: [email protected]
Subject: Re: [Test Equipment Design & Construction] Open Source Signature
Analyzer

I'm aware of that. I do not see open source documentation on how to build
it.
I could buy it from them and, when they go out of business or stop
supporting
it, you're sol.

On Sat, Jul 01, 2023 at 09:31:12AM -0400, Lester Veenstra via groups.io
wrote:
Already been done:



Lester B Veenstra? K1YCM M?YCM W8YCM 6Y6Y W8YCM/6Y 6Y8LV (Reformed
USNSG
CTM1)
lester@...

--
Paul Amaranth, GCIH | Manchester MI, USA
Aurora Group of Michigan, LLC | Security, Systems & Software
paul@... | Unix/Linux - We don't do windows


Re: Open Source Signature Analyzer

 

I'm aware of that. I do not see open source documentation on how to build it.
I could buy it from them and, when they go out of business or stop supporting
it, you're sol.

On Sat, Jul 01, 2023 at 09:31:12AM -0400, Lester Veenstra via groups.io wrote:
Already been done:



Lester B Veenstra? K1YCM M?YCM W8YCM 6Y6Y W8YCM/6Y 6Y8LV (Reformed USNSG
CTM1)
lester@...
--
Paul Amaranth, GCIH | Manchester MI, USA
Aurora Group of Michigan, LLC | Security, Systems & Software
paul@... | Unix/Linux - We don't do windows


Re: Open Source Signature Analyzer

 

Nice to see the responses.

I knew everyone would put up their favorite processor, but I use
ATMegas a lot in embedded projects. They're cheap, available and
convenient. I also have a closet full of them. You may port
the project to your favorite chip. As they say, that is left
as an exercise for the student ...

I use the makefile build environment and avoid the IDE. Generally,
libraries for all of the sensor chips are available, sometimes
multiple versions and sometimes even with well written code. I've been
writing software for over 40 years using essentially the same emacs
based tools and this fits right in.

If I were building this as a new product, I would probably
use a fpga or cpld and a fancy OLED graphics panel, but that's
not the point.

A couple of things I've run across during this project:

Sigrok has a SA plugin which you can use with a $10 Salaea clone.
It works, sort of, but I seem to recall some difficulty in getting
stable signatures. Anyway, that's clearly a path of last resort.

One of the HP application notes has a little test circuit with a
7490 decade counter along with expected signatures. These work
fine with a 5400a, they do not work with the Tek 308. The circuit
ties the start and stop lines together. The 5400a has a small
state machine that controls the acquisition, the 308 just uses a
couple of flipflops and gets confused in that situation. For the
308, start and stop pulses should be differentiated in time.

One easy way to test that the CRC logic and register reading stuff
is correct is to connect the data input to Vcc and see the result.
With a constand Data=High input, the signature is only dependant on the
number of clock transistions in the acquisition window. It is trivial
to write a program to generate the expected signatures, so it is easy
to verify that all works.

The obvious way to structure something like this is basing the code
on an FSA. There are lots of ways to write something like that, most
are tedious and error prone. While looking for a better way, I
ran across references to a program called Libero written by Pieter
Hintjens. Some reading showed that this man was a certified
genius. He sadly passed in 2016, but he left behind huge contributions
to the art.

Libero is available on github and took very little effort to compile
in a current environment. I built a template for the arduino model
and spent a couple days understanding how the fsa generator works. The
examples, unfortunately, are not very good in fostering understanding,
but it's worth the struggle. You write a "dialog" which is an FSA
description and it gets compiled into a code skeleton with all the
required stubs and the state machine code required to run it. If set
up correctly you just flesh out the stubs. Changing the FSA is trivial
and the compiler is smart enough not to overwrite your code so development
is rapid. I strongly recommend that anyone who writes code take a look
at this tool. iMatrix (his company) also published newsletters which are
very interesting to read. Here's a couple links:

This is sort of an overview and has links to some of the things Pieter did


Here's the libero documentation:


I now use this tool a lot, writing UIs are trivial.

Paul
--
Paul Amaranth, GCIH | Manchester MI, USA
Aurora Group of Michigan, LLC | Security, Systems & Software
paul@... | Unix/Linux - We don't do windows


Re: Open Source Signature Analyzer

 

Paul,
That is cool,
Yes I am interested in updates.
I recently purchased a Vector Labs Signature?analyser. I have not got around to testing it out.?
But I?have a pile of HP iron that needs repairing. :-)
It's a Pinball machine centric device but reasonably?priced and available.
?
Dave
VE7HR


On Fri, Jun 30, 2023 at 3:51?PM Paul Amaranth <paul@...> wrote:
At odd moments over the last couple years I've been working on a cheap,
easy to build design for a signature analyzer to be more or less comparable
to the HP 5004a or Tek 308.? I plan on making the design freely available.

It annoys me to no end that these instruments have gotten as expensive as
they have and this is my response to it.

It follows the same general design as the Tek 308 with? some TTL logic to
implement the CRC register and a microprocessor for the UI.? In this case
I'm using an AT Mega 2560 Pro driving a 4x20 LCD display.? These are easily
available, cheap (tenish for the processor, sixish for the display) and
the tool chain is widely available and free.

That processor is actually a bit overkill, a nano has enough i/o but lacks
sufficent ram, so I'm stuck with that without going to a bare chip.

I finally got back to it the other week (in order to avoid doing other
work :-) and yesterday actually got it to produce it's first actual
signatures that match up with my HP5004a.

If you want to see a picture of the display, I posted it over in
the eevblog test equipment forum under the title "signature analyzer
project".

Anyone have any interest in updates??

--
Paul Amaranth, GCIH? ? ? ? ? ? ?| Manchester MI, USA? ? ? ? ? ? ?
Aurora Group of Michigan, LLC? ?|? ?Security, Systems & Software
paul@...? ? ? ? ? ? ? |? ?Unix/Linux - We don't do windows







--
72 de Dave
VE7HR


Re: Open Source Signature Analyzer

 

Already been done:



Lester B Veenstra? K1YCM M?YCM W8YCM 6Y6Y W8YCM/6Y 6Y8LV (Reformed USNSG
CTM1)
lester@...

452 Stable Ln
Keyser WV 26726 USA

GPS: 39.336826 N? 78.982287 W (Google)
GPS: 39.33682 N? 78.9823741 W (GPSDO)


Telephones:
Home:????????????+1-304-289-6057
US cell??????????+1-304-790-9192
Jamaica cell:? +1-876-456-8898

-----Original Message-----
From: [email protected]
[mailto:[email protected]] On Behalf Of Paul
Amaranth
Sent: Friday, June 30, 2023 6:51 PM
To: [email protected]
Subject: [Test Equipment Design & Construction] Open Source Signature
Analyzer

At odd moments over the last couple years I've been working on a cheap,
easy to build design for a signature analyzer to be more or less comparable
to the HP 5004a or Tek 308. I plan on making the design freely available.

It annoys me to no end that these instruments have gotten as expensive as
they have and this is my response to it.

It follows the same general design as the Tek 308 with some TTL logic to
implement the CRC register and a microprocessor for the UI. In this case
I'm using an AT Mega 2560 Pro driving a 4x20 LCD display. These are easily
available, cheap (tenish for the processor, sixish for the display) and
the tool chain is widely available and free.

That processor is actually a bit overkill, a nano has enough i/o but lacks
sufficent ram, so I'm stuck with that without going to a bare chip.

I finally got back to it the other week (in order to avoid doing other
work :-) and yesterday actually got it to produce it's first actual
signatures that match up with my HP5004a.

If you want to see a picture of the display, I posted it over in
the eevblog test equipment forum under the title "signature analyzer
project".

Anyone have any interest in updates?

--
Paul Amaranth, GCIH | Manchester MI, USA
Aurora Group of Michigan, LLC | Security, Systems & Software
paul@... | Unix/Linux - We don't do windows


Re: Open Source Signature Analyzer

 

Hi Paul

Indeed interested

I'm working on a similar project, though I have a Tek 308 (which I got to verify my own project)
Mine is build around a Lattice MachXO2 (in fact a TinyFPGA AX2 board)
Display is a I2C LCD or a MAX7219 SPI (as I have these laying around)

Project was meant to teach me VHDL coding, in which I'm a totally newbie

Hardware is ready, FPGA code is in the very beginning

Be happy to share my project

Best
Hans J Eriksen


Den l?rdag den 1. juli 2023 kl. 00.51.37 CEST skrev Paul Amaranth <paul@...>:


At odd moments over the last couple years I've been working on a cheap,
easy to build design for a signature analyzer to be more or less comparable
to the HP 5004a or Tek 308.? I plan on making the design freely available.

It annoys me to no end that these instruments have gotten as expensive as
they have and this is my response to it.

It follows the same general design as the Tek 308 with? some TTL logic to
implement the CRC register and a microprocessor for the UI.? In this case
I'm using an AT Mega 2560 Pro driving a 4x20 LCD display.? These are easily
available, cheap (tenish for the processor, sixish for the display) and
the tool chain is widely available and free.

That processor is actually a bit overkill, a nano has enough i/o but lacks
sufficent ram, so I'm stuck with that without going to a bare chip.

I finally got back to it the other week (in order to avoid doing other
work :-) and yesterday actually got it to produce it's first actual
signatures that match up with my HP5004a.

If you want to see a picture of the display, I posted it over in
the eevblog test equipment forum under the title "signature analyzer
project".

Anyone have any interest in updates??

--
Paul Amaranth, GCIH? ? ? ? ? ? | Manchester MI, USA? ? ? ? ? ? ?
Aurora Group of Michigan, LLC? |? Security, Systems & Software
paul@...? ? ? ? ? ? ? |? Unix/Linux - We don't do windows






Re: Open Source Signature Analyzer

 

BTW, I should add that even though I can't find a use for a Signature Analyzer, I do love the concept of S.A.
Recently I wire-wrapped a 15-bit LFSR using DTL and early-TTL chips that date from the late 1960's. My purpose was to make a pseudo-random bit stream to simulate the radio beacon that was broadcast by the LES-3 satellite in 1965... [Obscure, eh?? ;-) ]

Trivia: Working at DEC in the early 80's, I designed in-house module test systems for Manufacturing. One or two systems included S.A., controlled by HPIB, probed via a bed-of-nails fixture, with the module running a test routine.

Pete


Re: Open Source Signature Analyzer

 

On Fri, Jun 30, 2023 at 07:35 PM, Adrian Godwin wrote:
Yes, interested in updates. I'd considered a similar project but actually very rarely need a signature analyser - which makes paying inflated prices even less attractive, and making use of someone else's design more attractive.
Yes, S.A. today is only useful in extremely rare cases. For working on older equipment, you need the known-good signatures, and the ability to create the necessary conditions. With newer equipment, BIST and Diagnostics will give a lot more info, and the speeds will be too high for a simple S.A. implementation.
You might consider running it on the RP2040 processor. It's cheaper than AVR and has loads of ram. I don't know if it's fast enough to do the capture in software-? it probably still needs the external CRC calculation. What's the maximum clock speed of a signature analyser ?
I would suggest that the AVR is plenty cheap enough (assuming it is a one-off hobby project, not a manufactured product). There are LOTS of MCU parts that are capable - everyone has their favorite (mine is currently T.I.). The usefulness of (or your familiarity with) the tool chain is more important than the specific MCU part (assuming that it meets the requirements for speed, RAM size, etc.).

The HP 5004A can be clocked at up to 10 MHz, the 5005A is 20 MHz. It might be practical to do everything in FW (including the LFSR), but probably easier and better to do the LFSR in HW (it's just 3 or 4 TTL-class chips).

Pete


Re: Open Source Signature Analyzer

 

While I have a 308 and a 5005B, I'd be interested in it for general principles.? Since I have available a decent STM32 infrastructure (still in development, of course), I'd likely duplicate the TTL logic in a CPLD, say an X2C32 or an X2C64.? Then again, I have an odd idea of "fun".

Harvey

On 6/30/2023 6:51 PM, Paul Amaranth wrote:
At odd moments over the last couple years I've been working on a cheap,
easy to build design for a signature analyzer to be more or less comparable
to the HP 5004a or Tek 308. I plan on making the design freely available.

It annoys me to no end that these instruments have gotten as expensive as
they have and this is my response to it.

It follows the same general design as the Tek 308 with some TTL logic to
implement the CRC register and a microprocessor for the UI. In this case
I'm using an AT Mega 2560 Pro driving a 4x20 LCD display. These are easily
available, cheap (tenish for the processor, sixish for the display) and
the tool chain is widely available and free.

That processor is actually a bit overkill, a nano has enough i/o but lacks
sufficent ram, so I'm stuck with that without going to a bare chip.

I finally got back to it the other week (in order to avoid doing other
work :-) and yesterday actually got it to produce it's first actual
signatures that match up with my HP5004a.

If you want to see a picture of the display, I posted it over in
the eevblog test equipment forum under the title "signature analyzer
project".

Anyone have any interest in updates?


Re: Open Source Signature Analyzer

 

Yes, interested in updates. I'd considered a similar project but actually very rarely need a signature analyser - which makes paying inflated prices even less attractive, and making use of someone else's design more attractive.

You might consider running it on the RP2040 processor. It's cheaper than AVR and has loads of ram. I don't know if it's fast enough to do the capture in software-? it probably still needs the external CRC calculation. What's the maximum clock speed of a signature analyser ?

I also wonder if the Logic Dart could be revisited with modern components. Enthusiasm for the device is variable but some find it useful.


Open Source Signature Analyzer

 

At odd moments over the last couple years I've been working on a cheap,
easy to build design for a signature analyzer to be more or less comparable
to the HP 5004a or Tek 308. I plan on making the design freely available.

It annoys me to no end that these instruments have gotten as expensive as
they have and this is my response to it.

It follows the same general design as the Tek 308 with some TTL logic to
implement the CRC register and a microprocessor for the UI. In this case
I'm using an AT Mega 2560 Pro driving a 4x20 LCD display. These are easily
available, cheap (tenish for the processor, sixish for the display) and
the tool chain is widely available and free.

That processor is actually a bit overkill, a nano has enough i/o but lacks
sufficent ram, so I'm stuck with that without going to a bare chip.

I finally got back to it the other week (in order to avoid doing other
work :-) and yesterday actually got it to produce it's first actual
signatures that match up with my HP5004a.

If you want to see a picture of the display, I posted it over in
the eevblog test equipment forum under the title "signature analyzer
project".

Anyone have any interest in updates?

--
Paul Amaranth, GCIH | Manchester MI, USA
Aurora Group of Michigan, LLC | Security, Systems & Software
paul@... | Unix/Linux - We don't do windows


Re: Incandescent lamp current limiter

 

On Tue, Jun 20, 2023 at 08:17 AM, Donald Hellen wrote:
Pete,

I'd love to see a circuit or article on this.?
It was a benchtop experiment a few months ago, using a couple of different light bulbs as a Load. Attached is a picture with a "schematic", and below is some text I posted on a forum at the time. If the 1K resistor is a pot, then it can be adjusted for a fairly wide range of trip currents.
Note that there are "real" electronic fuse circuits that do the same type of thing, and probably do it better.

See the napkin-schematic in the attached picture. Note the 10 ohm sense R, and the 1K "fault" R. With those values, it does NOT trip with a 55W bulb as a load, but it DOES trip with a 100W bulb. Quick experiments show that the trip threshold is roughly 5.5 mA through the 1K resistor.

BTW, it should be obvious, but changing the 1K resistor value changes the trip threshold Load current. In practice, the 10 ohms should be smaller, so that there is not so much V-drop with a larger load.

As expected, also note that it can trip on the inrush current of the light bulbs. That is, I was able to choose a "fault" resistor value such that it did NOT trip when the bulb was burning steady-state, bit it DID trip when turning on cold [to test: disconnected the Fault resistor, turned it on, then connected the Fault resistor].

Pete