I read the theory on the RF choke's flyback voltage blowing MOSFETs with interest. I was interested in the efficacy and potential penalty of having a Zener to protect from high VSWR load, but anyway...

I am not sure what kind of inductance model was used for L14 in simulation. It's an inductor on lossy #43 ferrite. Well, that loss in magnetic circuit may have only a small impact on the transient spike.

One thing to remember is that the drain impedance of these transistors is very low, like on the order of 5 - 20 ohm depending on the winding ratio of T1, supply voltage and the output power squeezed out from the amp (just draw the load line). So, L14 does not have to have a huge reactance at the lowest operating frequency. Also, there is little penalty in adding a parallel resistor to L14 as long as the R is well larger than the drain impedance. Say R is 470 ohm or something, and that value should be enough to keep the flyback voltage very low, if that is indeed a problem (I'm not really sold on that theory). Same thing can be done across the primary windings of T1. In fact, resistors are often added to the output transformers when using modern LDMOS transistors (to increase stability).

I also think mechanical stress on TO-92 can be a source of unreliability. I would prefer to use DFN or PLD-1.5W LDMOS transistors mounted on the board. SOT-89 is ok, too. If I had no choice other than TO-92, I would insert the transistors, with a tiny amount of thermally conductive silicone adhesive between the transistor and the copper, bolt the washer down carefully and lightly, wait for the adhesive to fully cure, loosen the bolt and solder the leads. However, replacing the transistors will be a lot of work when they blow.

Simulating high voltage from poorly matched load is a bit tricky. Hams use SWR routinely but that measure is totally inadequate for this discussion. What matters is the magnitude and angle of the return power. Short or open load is not exactly the harshest condition. There is a combination of mag and angle, or a point somewhere on the Smith chart that generates high voltage on the drain but that depends a lot on what goes in between.

Generally speaking, LDMOS is a lot tougher than bipolar or regular MOSFET in this scenario.

Incidentally, I have a Youkits EK1A 5W transceiver, and I thought blew the final. The kit came with a counterfeit 2SC2078 anyway, which I did not like. So I changed it with real Sanyo chip pulled from a junk CB rig but still didn't put out any power. So I did a bit of troubleshooting and quickly found out that the Zener diode for high SWR protection failed in short mode, and that burnt the tiny pathetic RFC winding. I removed the failed Zener, wound a real RFC on a stack of four FB43-101's with 28 AWG wire (3t) and it pushed out 40dBm! I was driving a counterfeit CB final transistor at double the rated power for maybe 500 CW QSOs and I thought the transistor flied, but it was the stupid Zener (looks like 3W-rated based on the size, about 5mm long and 2.5mm diameter) and RFC. I thought to do some research whether to put in a 5W Zener or leave it out, and found this thread.

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If I understand, the point of L14 is to limit current transients as current switches from one side of the push-pull to the other. This transition will happen at twice the operating frequency... I think having current flowing in both sides of the output transformer would be a Bad Thing, for many values of Bad!

Putting a resistor across L14, or adding a decoupling capacitor from the center tap to ground, defeats L14's purpose, doesn't it?

Some people have put a diode across L14 to catch the turn-off spike, but that reduces output power, suggesting it (the diode) is doing more than just catching the spike when drive is removed from the PA...

(Haven't heard how adding those 47 volt zeners affect operation. If they keep the BS170's from blowing, even if they self-sacrifice in the process-- I don't think they will, there's not that much power in the spikes-- isn't that a net win?)

I also think mechanical stress on TO-92 can be a source of unreliability.

Agree, and would probably show as a thermal problem.

Paul -- AI7JR

Thanks for describing your simulation and bench tests. Would you be able to run a simulation with a parallel R on the RFC when you have a chance? Say 100 to 1k or something of that order, though it could be varied to find the range where it doesn't affect the Pout/eta while keeping the spike voltage low enough.

Awesome, thank you Evan. When you run simulation with Zeners, how much capacitance does your Zener model put on the circuit? (obviously, this is voltage-dependent)

Thanks again - I'll only guestimate from similar spec'ed zeners then.

Zeners of course have much larger capacitance when the reverse voltage is near zero, but that's when the transistor is conducting, so that's not where the problem is.

In my view, the biggest negative of Zener is short failure mode, which could burn the board pattern.

Of course. A PTC resettable fuse in a SMD chip placed right next to the final amp would probably be a good idea anyway, if there's a good way to squeeze it in.