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ZapnSpark generic-FET SMD For Primo capsules #30185
Hi to everyone,
I'm trying to build a Zapnspark's generic Fet preamp, as small as possible, hence SMD components, used with various 3-wire Primo capsules like EM200,EM273,EM182. I want to use them mostly at live concerts, so output impedance, maxSPL-headroom, EMI/RF immunity and low noise are important factors for me. The point of this build is to fit the PCB inside the XLR plug.The whole board i designed is 24.2mm x 12mm. Ideally i'd like to fit also a 3pin mini-XLR on the other end(it will need some modification on the XLR's boot). I have a few questions about this design. 1) Can you spot any error on the PCB or the selected components? 2) Would 22nf ceramic caps between pins 1-2 and 1-3 add additional EMI/RF immunity, with no drawbacks? 3) Could i replaced the 2 BC860Cs with a dual PNP like SSM2220 or relevant, in order to avoid hfe matching and reducing size? Should i expect the same performance? 4) Primo capsules seems to give the least noise and highest maxSPL figures, when biased at roughly 9v. Is it just R2 and R5 which will change the Bias voltage? Any suggestion are welcome. I'll post my Fusion-Eagle project for inspection and reference, Eagle Library, and my Mouser basket. Mouser basket: I think it would be a great simple project for this community, if implemented right. Thanks in advance, Raptakis Konstantinos |
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Le 20/12/2021 à 12:48,
par_apwn@... a écrit?:
I would consider it essential.
3) Could i replaced the 2 BC860Cs with a dual PNP like SSM2220 or relevant, in order to avoid hfe matching and reducing size? Should i expect the same performance?SSM2220 has a significantly lower Hfe than BC860C, which would result in higher output impedance. You have to know that CMRR performance is determined by how close the impedance at pin 2 is compared to that at pin 3, in absolute value. With BC860C, the difference is about 6 ohms. Hfe matching is largely overrated. The output impedance is
roughly the impedance seen by the base divided by Hfe. |
On Mon, Dec 20, 2021 at 11:48 AM, @Par_apwn wrote:
Hi to everyone,As you are intending to use 3 terminal electrets with built in FETs and access to both drain and source, why do you want to add a second FET?? ? Wouldn't it be simpler (and have fewer components to find room for) to use this schematic instead:?/g/MicBuilders/files/Zapnspark/DIYgenericIntFET.pdf?? ? |
Arjay yes, i'm going to use this with 3 terminal electrets with built in JFET. i have used only BJTs driving the balance out.
That's the exact schematic i used for desinging this PCB with SMDs for this project. even the values are the exact same for now. I'm just considering which values should i change to control the Bias voltage. |