"With regard to the gap between the op-amp pins, I think we have to assume that the gap is sufficient to allow the specified JFET impedance to be utilised?

Otherwise there's no point in Texas supplying these devices in the SOIC or VSSOP format."

?

If that were true, then why would we still want air gaps, air connections, guard rings, turrets and you name it in the high-Z nodes of impedance converters in general, where most of the time the clearances between pads and tracks are mostly even greater?

?

These opamps are not only used in GOhm impedance circuits. So SOIC and even VSSOP can still be acceptable in those circuits. But for "our" circuits, especially if manually soldered, TI could have done us a great service with a different package design that would make it easier to add gaps and guardrings.

?

Jan

I added a cap between the ground side of the transformer and actual ground.

That sorted out the imbalance, the voltages now read perfectly. Next
step is to try it with a capsule or maybe check the noise floor with the
100pF cap first.

You are absolutely right that once the TX is decoupled it might as well
be referred to actual ground otherwise it's two caps in series. Also if
referred to actual ground you can use a polarised cap.

in this case it was easier to cut the trace from the TX to VG than it
was to cut the trace from the opamp output to the TX, so that's where I
put the cap. This also has the advantage of reducing the DC differential
between the primary and secondary, though that may be of no importance
at all.

So in summary I think my problems were caused by a mix of the following:

* My first cleaning of the board was insufficient, possibly because of
new solder flux that's harder to clean

* the opamp now operating at a gain of 7 rather than a gain of 1 might
have made the imbalance larger

* the transformer inherently needs decoupling for perfect VG balance
otherwise the DC offset at the output pulls VG off through the TX primary.


On 03/05/2025 10:35, Arjay1949 wrote:

I'm not sure there would be any significant difference in sound
quality between Vgnd and Gnd as a reference for the transformer
de-coupling?
I think it would simply mean that extra capacitance (the Vgnd
de-coupling caps) are added into the signal path, so that the signal
de-coupling is essentially still referenced to Gnd in the end.
I can't see that capacitance leakage current in those electrolytics
would be a problem, with the Vgnd resistors at 47k.? Might be, if they
were significantly higher values, as some circuits of this type seem
to recommend.
I think your offset problems are occuring because any DC offset in the
op-amp output is at a low impedance.
Introducing that offset into Vgnd? - via the DC feedback - is allowing
Vgnd to shift, as part of the feedback loop.
As far as I can see, referencing the transformer de-coupling to Gnd
removes all sources of any DC feedback in the 'loop' -- even any
(pretty unlikely) effect from capacitance leakage.

I'm not sure there would be any significant difference in sound quality between Vgnd and Gnd as a reference for the transformer de-coupling?
I think it would simply mean that extra capacitance (the Vgnd de-coupling caps) are added into the signal path, so that the signal de-coupling is essentially still referenced to Gnd in the end.
I can't see that capacitance leakage current in those electrolytics would be a problem, with the Vgnd resistors at 47k.? Might be, if they were significantly higher values, as some circuits of this type seem to recommend.
I think your offset problems are occuring because any DC offset in the op-amp output is at a low impedance.
Introducing that offset into Vgnd? - via the DC feedback - is allowing Vgnd to shift, as part of the feedback loop.
As far as I can see, referencing the transformer de-coupling to Gnd removes all sources of any DC feedback in the 'loop' -- even any (pretty unlikely) effect from capacitance leakage.

I tend to use stripboard for my mic experiments, so the SOIC to DIP? adaptors that kennjava mentions are really very useful.

See the image in the middle of page one of

I also find not including the input pin 3 a good was of keeping the very Hi-Z 1GΩ? resistor mounted away from the component tracks? ...

On Sat, May 3, 2025 at 11:00 AM, thet wrote:

any insights into real world noise performance vs the 1641?

The noise voltage density of the TLE071 is 11dB higher tha the 1641. Depending on expectations, that may be a problem.

voltage

On Fri, May 2, 2025 at 09:27 AM, thet wrote:

If there's a opamp at all equivalent to the 1641 in a DIP8 package I
would love to hear about it.

Well, for testing purposes - rather than actual final use? - then I've found the good old fashioned TL071? works quite well.

It has many similar parameters, but it does make a lot more noise!

As to your other problem, I've personally found that AC coupling the transformer to real ground, and including a series resistor in the op-amp output seems to help with any strange DC offset problems

Where I have had trouble in the past coupling an op-amp output to a transformer, it's always seems to have been DC coupling using the 'half rail' (Vgnd) as a reference that gives stability? problems.

My simple OPIC circuit ( ) uses a 47uF cap to AC couple the transformer output, which is then refernced to ground, rather than ''half rail'.?

I've had no DC offset problems at all that I can detect or measure..?

A friend of mine recently had exactly the same problem you described here and also solved it by thoroughly cleaning the PCBA with IPA. I gave him the advice to add a guardring. The guardring connects to the inverting input of the OPA and encircles the high-Z node on the non-inverting input. Ideally, the guardring should be placed on both sides of the PCB and, connected with vias and should be left free from solder mask, also on the area inside the guardring. This prevents the DC drift when there are flux residues on the board or when the board is used in a high humidity environment. But you still want to thoroughly clean the board as the resistive flux will decrease SNR.
The close spacing of the conductors that is inherant to SMT OPAs makes it hard to design PCBs that are free of noise and drift issues in high-Z circuits. TI should have given it another package, leaving out some pins as in some High Voltage ICs. This would allow the use of isolating slots, in combination with a guardring and prevent noise and drift issues.
The low-melt solder that you use could be part of the problem, as you already reasoned. The flux has to do its work at lower temperatures, so I assume it has to be of a more aggressive type which possibly lowers the Surface Insulation Resistance. You could check its datasheet or just use regular solder from a name brand like Kester.
Jan

This is good. Remember that, even with FET opamps, there is still some input bias current, which may alter the ideal calculated value.

so if V- leaks to In+ how exactly does that make the virtual ground go high?

Th evoltage at the non-inverting input is transmitted to the output and to the xfmr's primary, which in turns is connected to VG.

the opamp must(?) be amplifying DC from the leakage.

It sure does

presumably it's worse because I have the opamp set up for gain of 7 rather than just unity?

Likely.

On Thu, May 1, 2025 at 01:40 PM, thet wrote:

With a 100pF cap across the 1G resistor to simulate a capsule, I now have a very high virtual ground.

With a 10M resistor across the 1G resistor all the voltages come right.

Since I'm running the opamp with a gain of 7 and a 7:1 transformer I have my V+ at 24V

This is not normal, with a 15V zener the voltage should be less than 16V.

With just the 100pf cap I get a virtual ground of about 20V.

The VG voltage should be pretty close to half of V+.

Drop across R5 is just over 2V (~26-24v) so current draw is nominal.

OK

Pins 2 and 6 are approximately at virtual ground. ie 20v or so.

OK.

With the 10M resistor in place those pins drop to ~ 12v

This shouldn't happen.

If the board is leaky ie imperfect insulation across the input from dirt would it cause this?

It is a possibilit