Hi there Jose thanks for your mail. I tried to read your nice presentation and did some tests. I can do Cal 44 cal 45 and they pass that. but when I do Cal 48 it fails. And actually the failure got worse. I tried to work open loop to se the offset and I se a HUGE offset. setting to 300khz we should se something from 1.3-6Mhz I get 165Mhz there and going to 30Mhz give me 190Mhz and 40Mhz over 200Mhz. So what would you suggest me to do. 73 Peter
To: hp_agilent_equipment@...
From: eb5agv@...
Date: Wed, 31 Aug 2011 10:00:35 +0200
Subject: Re: [hp_agilent_equipment] Problems with HP8753C networkanalyzer
Hi Peter,
I went through a similar problem (not exactly the same, but the error
was the same) and was able to fix it by an internal source auto-calibration.
Please, check my WEB at for more
information about what I did and the results. If you have any doubt,
just ask :-)
I hope it helps!
Regards,
JOSE
At 09:54 31/08/2011, you wrote:
hi group I have a HP8753C analyzer option 6 (6Ghz) that has a
HP85047 testset. I get the following error when power on. No IF
found check R input levelPhase lock lost when I se my display I
have not strait line under 90Mhz. There is like noise on the line
there. I did some tests in CW mode and se I loose my phase lock
going under 87Mhz. Looking on the Cw signal with a spectrumanalyzer
I se a very unstable signal. So when going below 87Mhz the display
say Phase-lock lost. Going above make a stable frequency signal.
Measurering the power out of the source (level set to 0dBm out say
around -11dBm but that is after a loss of 6dB in a powersplitter
(hp11667). so output od source is around -5dBm measured at 1Ghz.
Level is flat over the range. What can be the root course for that
problem. Best regards Peter Hansen OZ1LPR
--
73 EB5AGV - JOSE V. GAVILA - IM99sm La Canyada - Valencia(SPAIN)
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